In digital electronics, logic circuits exhibiting such logic functions as AND, OR, NAND and NOR are produced as integrated circuits with several logic circuits being fabricated on a single integrated circuit chip. Integrated circuit technology has lead to miniaturization of electronic circuits facilitating the placement and use of digital electronics in locations once thought impossible. A continuing goal of circuit design is to increase circuit density thereby broadening areas of use for electronic circuits.
Field effect transistors are known active circuit elements which have been widely used in integrated circuits. Basically, the field effect transistor (FET) is comprised of a semiconductor substrate exhibiting one type of conductivity into which is formed, by diffusion for example, source and drain regions each of the same conductivity-type but opposite in conductivity to that of the substrate. A channel region separates the source from the drain. The gate is situated over the channel and separated therefrom by insulating material. Separate electrodes are connected to each of the source, drain and gate areas. The application of appropriate electrical potentials to the source, drain and gate electrodes produces electrical current between the source and drain through the channel. One type of FET, using a P-type silicon substrate, undergoes conventional processing to create two N+ conductivity-type diffusion regions forming the source and drain regions. These regions are located to create a channel region therebetween. An isulating material such as silicon dioxide is formed over the channel region with a metal gate being deposited over the insulation. Electrodes are connected to the source, drain and gate. As is known, device dimensions, doping of the semiconductor material, etc., are controlled to give the device predetermined characteristics such as channel threshold voltage. Applying an external potential of proper polarity to the channel overcomes this threshold voltage, causing the device to conduct through the channel. The external potential is applied directly to the gate through the gate electrode and to the channel by field effect action across the insulator. This gate bias controls the passage of charge carriers along the current path through the channel area.
In recent years, it has become known that a resistive layer instead of a metallic layer may be used as the FET gate. An FET using a resistive gate material is known as a resistive gate field effect transistor (REGFET). Such a device may use polysilicon material for the resistive layer, the resistivity of the resistive layer being determined by the selective doping to the polysilicon. For example, gate resistance values can be varied by ion implantation with boron (P. K. Ko et al, Design and Performance of Resistive Gated MOSFETS for Analog Integrated Circuits, IEDM, Dec. 5, 1979, page 22.2.). Resistive gate field effect transistors have generally been applied only to linear circuits, such as amplifiers.
Digital circuits comprised of FET devices have until recently been constructed with conductive gates, either metal or silicon. In U.S. Pat. No. 4,158,239, which issued June 12, 1979, and was assigned to the same assignee as the present invention, Bertin, the inventor of the invention disclosed herein describes a storage cell comprised of resistive gate FETs forming a flip-flop circuit. However, circuits exhibiting logic functions such as the AND and OR functions continued to be constructed with conductive gate FETs.